DI02000181 · Semester 2 · 5G scheme
Digital Techniques
Notes and solutions following the Gujarat Technological University (GTU) syllabus for DI02000181. Independent material — not issued by the university.
Materials
Complete Book
The whole syllabus, unit by unit, written for the exam.
Complete Book
76 pages
Premium Preview · 10 pages
Past Papers
Original question papers from previous exams.
PYQ Solutions
Past university papers, fully solved.
Solved past papers — detailed answers
28 pages · English + ગુજરાતી
Premium Preview · 5 pages
Syllabus units
Unit 1: Number Systems & Codes
- 1.1 Number Systems 1.1.1 Types of Number System(Binary, Decimal, Octal & Hexadecimal) 1.1.2 Base or Radix of Number system 1.1.3 Conversion of Number System from one number system to another number system.
- 1.2 Binary Arithmetic(Addition, Subtraction, Multiplication and Division)
- 1.3 Complements 1.3.1 1's & 2's Complements 1.3.2 Subtraction using 1's & 2's Complements
- 1.4 Codes 1.4.1 BCD, Gray Code, Excess-3.
Unit 2: Logic Gates & Boolean Algebra
- 2.1 Two state logical operation 2.1.1 Represent signals in logic 0 and logic 1 in Positive and Negative logic system.
- 2.2 Tristate logic operation
- 2.3 Logic Gates: 2.3.1 Basic Gates: AND,OR ,NOT Gate Universal Gates: NAND and NOR Gate Special purpose gates: EX-OR and EX-NOR Gate 2.3.2 Symbol, Logical Expression, Truth Table, and Electrical equivalent circuit of each gate 2.3.3 Implementation of AND, OR and NOT gate using Universal gates.
- 2.4 Boolean Algebra: 2.4.1 Laws, Theorems and Postulates of Boolean Algebra 2.4.2 State and verification of De Morgan's First and Second theorem. 2.4.3 Listing of Boolean expressions for Properties of Boolean Algebra. 2.4.4 Duality Theorems 2.4.5 Simplification of given expression using Boolean Algebra 2.4.6 Development of Logic circuit using the given Boolean Expression
Unit 3: Digital Logic Simplification
- 3.1 Standard Boolean representation: 3.1.1 Sum of Product (SOP) and Product of Sum (POS) 3.1.2 Min-Term & Max-Term 3.1.3 Conversion between SOP & POS form. 3.1.4 Realization using NAND/NOR Gates
- 3.2 K-map reduction technique for the Boolean expression: 3.2.1 Minimization of Boolean expressions (upto 4 variables) using SOP and POS form 3.2.2 Don't care condition in K-map
Unit 4: Combinational Logic Circuits
- 4.1 Arithmetic Circuits 4.1.1 Half Adder, Full Adder, Half Subtractor , Full Subtractor, Block diagram of parallel adder using full adder block (up to 4 - bit)
- 4.2 Decoder: 2 to 4 & 3 to 8
- 4.3 Encoder: 4 to 2 & 8 to 3
- 4.4 Multiplexer: 4 to 1
- 4.5 Demultiplexer: 1 to 4
- 4.6 Code Converter: Gray to Binary and Binary to Gray (up to 4 bits)
Unit 5: Sequential Logic Circuit
- 5.1 Sequential Circuit: Introduction 5.1.1 Terms related to sequential Circuit: Digital Clock & Duty cycle 5.1.2 Block Diagram of sequential circuit 5.1.3 Comparison of Combinational & Sequential Logic Circuit 5.1.4 Classification of Sequential Circuits 5.1.5 Flips- Flops and Latch 5.1.6 RS-Latch using NAND and NOR 5.1.7 Triggering methods-Edge trigger and Level Trigger
- 5.2 Flip-Flops: S-R, J-K, T and D 5.2.1 Truth table and logic circuits of each flip-flop
- 5.3 Counters 5.3.1 Asynchronous up and down counter (up to 4 bit) 5.3.2 Synchronous up and down counter (up to 4 bit)
About this course
The Digital Techniques syllabus for 2nd-semester Instrumentation & Control diploma engineering students is designed to provide a strong foundation in digital concepts. It helps students develop essential digital skills, enabling them to understand and progress in more advanced engineering subjects. The curriculum aligns with industry needs, ensuring students are well-prepared for successful engineering careers and equipped to adapt to new technologies and challenges.